Comp 2280 final study part 2

ohsobeezee23's version from 2018-04-07 19:16

THE CPU (Also read the CRAM stuff)

Question Answer
CPU stands forCentral processing unit
what does it domost if not all computations that take place in the computer
What is MARMemory Address Register
What is MAR used forto hold address in a memory transfer
What is MDRMemory Data register
What is MDR used forto hold data in a memory transfer
What is a register Filethe place which consists of all general purpose registers
What is a Instruction cyclethe entire process from fetching the instruction to executing it
Instruction Cycle (the thing Zapp mentioned but didn't write down)Instruction fetch, instruction decode, operand fetch, instruction execution, store results/write back, interrupt processing

Instruction cycle

Question Answer
Instruction fetch does?fetch the instruction from memory
Instruction Decodedecodes the instruction
Operand FetchFetch operands, this step is not always required, and depends on addressing modes used
Instruction Executionexecutes the instruction (WOW! 10/10 definition)
Store results/Write-Backwrite results if necessary
Interrupt Processingprocess any pending interrupt requests; not always required
what is a micro-operationa very simple operation carried out by the CPU -> more basic than the instruction in the ISA (NOT THE SAME AS MICRO-INSTRUCTIONS)
what is a processor clockused to provide synchronous cycles (the faster the clock moves the more CPU can do)

Memory interfacing

Question Answer
From a high level point of view how does the CPU get data to/from memory?first calc the address to be accessed, then write the address addr into the MAR, then CU sends a "read" signal to memory, then read the data from MDR
How do we store a value x to a location addrcalc the address to be accessed
Write the data x to the MDR
CU sends a "write" signal to memory
How does the CU know when a memory op is complete?1. memory sends a control signal to the CU to indicate transfer has been completed (if using asynchronous transfer), or
2. The control unit knows how many clock cycles to wait for the memory transfer to complete (if using synchronous transfers) ->These are called wait states, simpler to implement but are error prone and require bot knowledge of CPU speed and memory
First two steps for executing a program?Need to be loaded from disk into memory
then the PC register is set to point to the first instruction in the program (there is a lot more steps actually)
What happens in the fetch instruction sub-cycleMAR is loaded with the contents of the PC
A read control signal is sent to the memory
(Memory access time elapses and) the addressed word is read from memory into the MDR
The IR is loaded with the contents of the MDR (instruction to be executed)
What happens after the fetch?the PC is incremented by the length of the current instruction
What happens to the instruction after the increment?instruction is ready to be decoded and executed (all operands that reside in main memory have tobe fetched, and ALU does its thing)
What happens after execution of argument?if the result is to be stored in main memory then it is loaded into the MDR and the destination address is loaded into MAR

Memory building (Probably on exam) When using mem chips from lower amnt of memory to higher i.e using "16k x 8" to "64k x 32"

Question Answer
How do we calculate the amount of chips for each word?take the lower memory value of both and then divide (in our case 32/8)
How do we calculate the amount of rows?take the higher value and divide those (in our case 64/16)
How do we calculate the number of chip/word/row select lines?take the amount of chips and hit that with a log base 2 (in our case (log base 2) (4))
How do we calculate the number of offset linesWe take the lower memory bigger number (16k) and hit that with a log base 2 (in our case Log2(16k) = 14)
How do we calculate the number of address lines?we take number of select lines and add the offset line (2+14) or you just log the bigger big memory (log2(16k))

CPU structure

Question Answer
How does the CPU connect individual componentsby using internal busses
What is a busa set of parallel wires that interconnect a set of components
What does the number of buses effectthe amount of concurrency (and performance) that can be achieved
What is the purpose of the CU (control unit)what is done by the CPU
How does CU control the CPU?controls the control points which control the data flow
How do we implement control points?using tri-state buffers (outputs to bus) and chip enable (inputs from bus)

Finite State Machines

Question Answer
What is a state machine?any device that stores the status of something at a given time and can operate on input to change the status and/or cause an action or output to take place for any given change.
When no inputs label a transition thenthe the transition is on a positive (rising) clock edge

Combinational circuits/Sequential (but more on them later)

Question Answer
What is a combinational circuitcircuits whose outputs depends only on the current inputs
What is a sequential circuitcircuits whose output depends on current inputs and its current state
for comb circuits what is the output depended on?current inputs
What are the outputs defined byBoolean function of the inputs
any combinational circuit can be implemented asa sum of products (SOP) and product of sums (POS)
Three common combinational circuitsdecoder, multiplexer, and adders
For a decoder how many inputs how many outputsn inputs, 2^n outputs
What is a multiplexern-bit selector and 2^n inputs one output
What are they used forin CPU's they select one input from multiple inputs to a given unit// or to select which computed value to pass to next stage// or to place memory cotents on bus.
what do Half adders doAdd tow bits to produce a one-bit sum and carry out bit
What do Full adders doadd two bits and carry-in produce one bit sum and carry-out (half adder does not have carry ins)
what is a Timing diagramis a graphical representation of the input and output signals of a circuit where the domain is time
what are timing diagrams used forto illustrate how a circuit works and are useful for debugging

Sequential circuits

Question Answer
What is a sequential circuitcircuits whose output depends on current inputs and its current state
Example of sequential circuitgarage opener
Push the button (input) and the door opens
Push the button again and he door closes
The door opens/closes when the button is pressed,depending on its state
Sr Latch functionif output 1 (at Q) if R=0, S=1 (known as a set)
Output at 0( at Q) if R=1, S=0 (known as a reset)
hold output (at Q,Q') if R=S=0
what happens when S=R=1the output is undefined (S AND R SHOULD NEVER BOTH BE SET TO 1)
What is purpose of Write enableallows Q to be reset/set iff WE is 1 (if we do this we get a D latch where we replace the S,R signals with a single signal D)
What are flip flopsflip flops change output only on a transition from 0 to 1 and vice versa
What are flip flops useful for?useful for building state machines, counters, shift registers, and so on (for a simple D latch we can build larger storage elements)
What is a registerregisters store a multi bit value, we use a collection of D latches, all controlled by common WE.
When will register latches reset?whenever WE = 1
For the LC# how much does a word equal to16 bits (for most other computers it is 32 bits, and now we are moving to 64 bits)
How do we build a memory?Each bit is a gated D-latch
each location consists of w bits
w = 8 if the memory is byte addressable (LC# w =16) and then we do addressing